1. Technical Field
The present disclosure relates to a metal-graphene heterojunction metal interconnects, a method of forming a metal-graphene heterojunction metal interconnects in a semiconductor device, and a semiconductor device including a metal-graphene heterojunction metal interconnects.
2. Description of the Related Art
As the size of the semiconductor devices decrease, the width and spacing of the metal interconnects gradually decrease. When metal interconnects in a semiconductor device are made of copper, the resistance rapidly increases as the width decreases, and thus it is difficult to use it for a semiconductor device in size from several to several tens of nanometers.
Recently, a method of applying a carbon material for interconnects as a low-resistance material has been studied around the world. Among carbon materials, a method of applying graphene to interconnects is being broadly studied.
The graphene is a two-dimensional conductive material made of carbon atoms. The graphene has a honeycomb structure such that it is chemically stable and it can be easily processed into one-dimensional or two-dimensional nano-sized pattern. In addition, the graphene has high thermal conductivity and has excellent electrical conductivity that can transfer electrons as if they have no mass. Accordingly, it is attracting attention as a next-generation electronic material that can replace silicon which is currently used as the major material for semiconductor devices.
In addition, the graphene has ballistic transport characteristic due to quantum conduction and thus is expected to be used as low-resistance interconnects for a very large scale integrated circuit (VLSI) to replace metal interconnects.
In order to use graphene as metal interconnects of a semiconductor device, high-quality graphene is required. To this end, in the related art, a metal-graphene heterojunction metal interconnect has been fabricated by transferring a large-area graphene synthesized by chemical vapor deposition (CVD) to a metal interconnect and patterning it via an etching process. In the related art, however, there are problems in that the graphene synthesis and transfer process incur high manufacturing cost and take a long processing time, and that graphene is damaged (torn or wrinkled) or transfer medium residues are generated in the transferring process, which adversely affects the performance of the electronic devices. Further, graphene may be physically damaged or become defective in the process of etching it, such that the electrical characteristics of the graphene may be deteriorated. Also, since graphene has a two-dimensional plate-like structure, it is difficult to apply it to vertical interconnect structure.
Under the circumstances, what is required is a technique to fabricate a metal-graphene heterojunction metal interconnect by coating graphene on the entire surface of a vertical or horizontal metal interconnect via a single graphene synthesis process.